Performance-Optimum Superscalar Architecture for Embedded Applications

摘要

Embedded applications are widely used in portable devices such as wirelessphones, personal digital assistants, laptops, etc. High throughput and realtime requirements are especially important in such data-intensive tasks.Therefore, architectures that provide the required performance are the mostdesirable. On the other hand, processor performance is severely related to theaverage memory access delay, number of processor registers and also size of theinstruction window and superscalar parameters. Therefore, cache, register fileand superscalar parameters are the major architectural concerns in designing asuperscalar architecture for embedded processors. Although increasing cache andregister file size leads to performance improvements in high performanceembedded processors, the increased area, power consumption and memory delay arethe overheads of these techniques. This paper explores the effect of cache,register file and superscalar parameters on the processor performance tospecify the optimum size of these parameters for embedded applications.Experimental results show that although having bigger size of these parametersis one of the performance improvement approaches in embedded processors,however, by increasing the size of some parameters over a threshold value,performance improvement is saturated and especially in cache size, incrementsover this threshold value decrease the performance.